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Computer Architecture Laboratory

UCF EECS Department Building:. Professor Ronald F. DeMara. Highlighted Media and Products:. Our paper Self-Organized Sub-bank SHE-MRAM-based LLC: An Energy-Efficient and Variation-Immune Read and Write Architecture accepted to. Integration, the VLSI Journal. Our paper Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization accepted to. Our paper Low-Energy Deep Belief Networks using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons accepted to. Our paper "Heterogene...

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Computer Architecture Laboratory | cal.ucf.edu Reviews
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UCF EECS Department Building:. Professor Ronald F. DeMara. Highlighted Media and Products:. Our paper Self-Organized Sub-bank SHE-MRAM-based LLC: An Energy-Efficient and Variation-Immune Read and Write Architecture accepted to. Integration, the VLSI Journal. Our paper Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization accepted to. Our paper Low-Energy Deep Belief Networks using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons accepted to. Our paper Heterogene...
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2 overview
3 people
4 publications
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6 computer architecture laboratory
7 harris engineering center 242
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Computer Architecture Laboratory | cal.ucf.edu Reviews

https://cal.ucf.edu

UCF EECS Department Building:. Professor Ronald F. DeMara. Highlighted Media and Products:. Our paper Self-Organized Sub-bank SHE-MRAM-based LLC: An Energy-Efficient and Variation-Immune Read and Write Architecture accepted to. Integration, the VLSI Journal. Our paper Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization accepted to. Our paper Low-Energy Deep Belief Networks using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons accepted to. Our paper "Heterogene...

INTERNAL PAGES

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1

Ronald F. DeMara, Personal Page

http://cal.ucf.edu/demara.html

Ronald F. DeMara. Office Fax: (407) 823-5835. Electrical and Computer Engineering. University of Central Florida. Director of Computer Architecture Laboratory. Ronald F. DeMara. Ronald F. DeMara.

2

Overview CAL

http://cal.ucf.edu/overview.html

Evolvable Hardware focusing on self-healing and group testing techniques to extend mission lifetime of Field Programmable Gate Arrays (FPGAs) and Field Programmable Analog Arrays (FPAAs). Extraction and remodeling of critical paths to optimize energy-delay-product and aging-mitigation in ALU design. Design and modeling of post-CMOS switching devices emphasizing non-Von Neumann logic-in-memory computing approaches. Energy and Quality-Aware architectures for signal and image processing. 8226; Two miniBEECu...

3

Publications

http://cal.ucf.edu/publication.html

S D Pyle, H. Li, and R. F. DeMara, "Compact Low-Power Instant Store and Restore D Flip-Flop using a Self-Complementing Spintronic Device,". In-press, accepted 9 May, 2016. Pre-print available at: 10.1049/el.2015.4114,. F Alghareb, R. A. Ashraf, R. F. DeMara, "Energy and Delay Tradeoffs of Soft Error Masking for 16nm FinFET Logic Paths: Survey and Impact of Process Variation in Near Threshold Region,". IEEE Transactions on Circuits and Systems II. In-press, accepted 16 April, 2016. H Shabani, A. Roohi...

4

Computer Architecture Laboratory

http://cal.ucf.edu/activities.html

ISQED, Trip Report, Data Movement Energy Innovations. Reactive Rejuvenation of CMOS Logic Paths Using Self-Activating Voltage Domains.

5

Ronald F. DeMara - Teaching

http://cal.ucf.edu/teaching.html

University of Central Florida. UCF Log In: toggle list of UCF services. Teaching Schedule - Summer 2016:. 8226; Mondays: 2:00PM to 3:50PM in room "HEC117 and HEC310". 8226; Wednesdays: 2:00PM to 3:50PM in room "HEC117& HEC310". Office Hours - Summer 2016. Noon to 2:00PM and 4:00PM to 5:00PM. Noon to 2:00PM and 4:00PM to 5:00PM. 8226; Also, all email. Inquiries will be replied to promptly. Getting started with Evolvable Hardware (EHW).

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UCF EECS Department Building:. Professor Ronald F. DeMara. Highlighted Media and Products:. Our paper Self-Organized Sub-bank SHE-MRAM-based LLC: An Energy-Efficient and Variation-Immune Read and Write Architecture accepted to. Integration, the VLSI Journal. Our paper Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization accepted to. Our paper Low-Energy Deep Belief Networks using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons accepted to. Our paper "Heterogene...

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