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Implementation of Computation Group (University of Pennsylvania)

Implementation of Computation Group. The Implementation of Computation. Group, under the direction of Prof. André DeHon. Interconnect (what are the fundamental interconnect requirements of a design? And how do we systematically design interconnect? How do we map onto interconnect substrates? And ` messy' computing (how do we guarantee correct or adequate behavior when fabrication is stochastic, devices fail both transiently and permanently during operation, and programs contain bugs? What abstracti...

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Implementation of Computation Group (University of Pennsylvania) | ic.ese.upenn.edu Reviews

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Implementation of Computation Group. The Implementation of Computation. Group, under the direction of Prof. Andr&eacute DeHon. Interconnect (what are the fundamental interconnect requirements of a design? And how do we systematically design interconnect? How do we map onto interconnect substrates? And ` messy' computing (how do we guarantee correct or adequate behavior when fabrication is stochastic, devices fail both transiently and permanently during operation, and programs contain bugs? What abstracti...

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Implementation of Computation Group (University of Pennsylvania) | ic.ese.upenn.edu Reviews

https://ic.ese.upenn.edu

Implementation of Computation Group. The Implementation of Computation. Group, under the direction of Prof. Andr&eacute DeHon. Interconnect (what are the fundamental interconnect requirements of a design? And how do we systematically design interconnect? How do we map onto interconnect substrates? And ` messy' computing (how do we guarantee correct or adequate behavior when fabrication is stochastic, devices fail both transiently and permanently during operation, and programs contain bugs? What abstracti...

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Implementation of Computation Group. FPGA 2015, Monterey Harbor. Left to Right: Brooke Fugate, Hans Giesen, Andr&eacute DeHon. Nick Roessler, Edin Kadric. FCCM 2014, Boston Gardens. Left to Right: Brooke Fugate, Benjamin Gojman. IC Group with Ducklings in Boston Gardens. Inspired by Benjamin Gojman. S work with DUKs. Left to Right: Benjamin Gojman. FPGA 2014, 17 Mile Drive. Left to Right: Kunal Mahajan, Andr&eacute DeHon. Brooke Fugate, Benjamin Gojman. FPGA 2010, Monterey. Left to Right: Benjamin Gojman.

2

Implementation of Computation: Distributions

http://ic.ese.upenn.edu/distributions.html

Implementation of Computation Group. For power optimized memory mapping described in FPGA 2015 paper Impact of Memory Architecture on FPGA Energy Consumption. Bluespec System Verilog source release. For Fat Pointer designs described in the CCS 2013 paper Low-Fat Pointers: Compact Encoding and Efficient Gate-Level Implementation of Fat Pointers for Spatial Safety and Capability-based Security. Accurate Parallel Floating-Point Accumulator. Bluespec System Verilog source release. VPR 5 patches and scripts.

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People

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Implementation of Computation Group. Routing, Variation and Fault Tolerance. Routing, Variation and Fault Tolerance. Nano Architectures, Reliability, Fault Tolerance, Variation Tolerance. Reliable, ultra-low energy architectures. Spatial, Concurrent Architectures. Defect and Fault Tolerance. Parallel Placement and CAD. Room# 315, 200 South 33rd Street, Electrical and Systems Engineering Department, Philadelphia, University of Pennsylvania, PA 19104.

4

Credits

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Implementation of Computation Group. We thank the following funding agencies for their support. We also thank the following sponsors for their generous donations. For donating FPGA chips, ISE software and FPGA IP cores. For FPGA synthesis tools. For hardware design and verification tools. For their Java profiler. And YourKit .NET Profiler. Room# 315, 200 South 33rd Street, Electrical and Systems Engineering Department, Philadelphia, University of Pennsylvania, PA 19104.

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Publications

http://ic.ese.upenn.edu/publications.html

Implementation of Computation Group. Hans Giesen, Benjamin Gojman, Raphael Rubin, Ji Kim and Andr&eacute DeHon. Continuous Online Self-Monitoring Introspection Circuitry for Timing Repair by Incremental Partial-reconfiguration (COSMIC TRIP) In Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines. May, 2016. [Abstract and Paper Link]. Edin Kadric, Paul Gurniak, and Andr&eacute DeHon. Accurate Parallel Floating-Point Accumulation. In IEEE Transactions on Computers. Special Issu...

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Implementation of Computation Group. The Implementation of Computation. Group, under the direction of Prof. Andr&eacute DeHon. Interconnect (what are the fundamental interconnect requirements of a design? And how do we systematically design interconnect? How do we map onto interconnect substrates? And ` messy' computing (how do we guarantee correct or adequate behavior when fabrication is stochastic, devices fail both transiently and permanently during operation, and programs contain bugs? What abstracti...

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